Changeset 1804
- Timestamp:
- 04/06/12 15:49:39 (14 months ago)
- Location:
- trunk/firmware/openos/bsp/boards
- Files:
-
- 4 added
- 8 edited
-
radiotimer.h (modified) (3 diffs)
-
xpressohack/board.c (modified) (5 diffs)
-
xpressohack/board_info.h (modified) (2 diffs)
-
xpressohack/lpc17xx_pinsel.c (added)
-
xpressohack/lpc17xx_pinsel.h (added)
-
xpressohack/lpc17xx_uart.c (added)
-
xpressohack/lpc17xx_uart.h (added)
-
xpressohack/radiotimer.c (modified) (6 diffs)
-
xpressohack/ssp_spi_wrapper.c (modified) (2 diffs)
-
xpressohack/timer.c (modified) (4 diffs)
-
xpressohack/uart.c (modified) (4 diffs)
-
xpressohack/uart_config.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/firmware/openos/bsp/boards/radiotimer.h
r1793 r1804 9 9 10 10 #include "stdint.h" 11 #include "board.h" 11 12 12 13 //=========================== define ========================================== … … 15 16 16 17 typedef void (*radiotimer_compare_cbt)(); 17 typedef void (*radiotimer_capture_cbt)( uint16_ttimestamp);18 typedef void (*radiotimer_capture_cbt)(PORT_TIMER_WIDTH timestamp); 18 19 19 20 //=========================== variables ======================================= … … 27 28 void radiotimer_setStartFrameCb(radiotimer_capture_cbt cb); 28 29 void radiotimer_setEndFrameCb(radiotimer_capture_cbt cb); 29 void radiotimer_start( uint16_tperiod);30 void radiotimer_start(PORT_TIMER_WIDTH period); 30 31 // direct access 31 uint16_tradiotimer_getValue();32 void radiotimer_setPeriod( uint16_tperiod);33 uint16_tradiotimer_getPeriod();32 PORT_TIMER_WIDTH radiotimer_getValue(); 33 void radiotimer_setPeriod(PORT_TIMER_WIDTH period); 34 PORT_TIMER_WIDTH radiotimer_getPeriod(); 34 35 // compare 35 void radiotimer_schedule( uint16_toffset);36 void radiotimer_schedule(PORT_TIMER_WIDTH offset); 36 37 void radiotimer_cancel(); 37 38 // capture 38 uint16_tradiotimer_getCapturedTime();39 PORT_TIMER_WIDTH radiotimer_getCapturedTime(); 39 40 40 41 -
trunk/firmware/openos/bsp/boards/xpressohack/board.c
r1796 r1804 31 31 // OpenMote SLP_TR [P1.22] 32 32 #ifdef OPENMOTE 33 LPC_PINCON->PINSEL3 &= ~ 0x3<<12; // GPIO mode33 LPC_PINCON->PINSEL3 &= ~(0x3<<12); // GPIO mode 34 34 LPC_GPIO1->FIODIR |= 1<<22; // set as output 35 35 LPC_GPIO1->FIOCLR |= 1<<22; // pull low … … 37 37 //LPCXpresso is [P2.8] 38 38 #ifdef LPCXPRESSO1769 39 LPC_PINCON->PINSEL4 &= ~ 0x3<<16; // GPIO mode39 LPC_PINCON->PINSEL4 &= ~(0x3<<16); // GPIO mode 40 40 LPC_GPIO2->FIODIR |= 1<<8; // set as output 41 41 LPC_GPIO2->FIOCLR |= 1<<8; // pull low … … 43 43 44 44 // [P0.17] RSTn 45 LPC_PINCON->PINSEL1 &= ~ 0x3<<2; // GPIO mode45 LPC_PINCON->PINSEL1 &= ~(0x3<<2); // GPIO mode 46 46 LPC_GPIO0->FIODIR |= 1<<17; // set as output 47 47 // [P0.22] ISR 48 LPC_PINCON->PINSEL1 &= ~ 0x3<<12; // GPIO mode49 LPC_GPIO0->FIODIR &= ~ 1<<22; // set as input48 LPC_PINCON->PINSEL1 &= ~(0x3<<12); // GPIO mode 49 LPC_GPIO0->FIODIR &= ~(1<<22); // set as input 50 50 LPC_GPIOINT->IO0IntClr |= 1<<22; // clear possible pending interrupt 51 51 LPC_GPIOINT->IO0IntEnR |= 1<<22; // enable interrupt, rising edge … … 57 57 leds_init(); 58 58 uart_init(); 59 59 60 spi_init(); 60 61 // i2c_init(); … … 62 63 radio_init(); 63 64 radiotimer_init(); 65 64 66 } 65 67 -
trunk/firmware/openos/bsp/boards/xpressohack/board_info.h
r1794 r1804 11 11 #define _BOARD_INFO_H 12 12 13 #include "string.h" 14 13 15 #include "stdint.h" 14 16 #include "LPC17xx.h" 15 17 #include "lpc_types.h" 16 18 17 #ifndef LPCXPRESSO176918 #define LPCXPRESSO176919 #endif19 //#ifndef LPCXPRESSO1769 20 //#define LPCXPRESSO1769 21 //#endif 20 22 // 21 23 //#ifndef OPENMOTE … … 31 33 32 34 #define DISABLE_INTERRUPTS() __disable_irq(); 35 33 36 #define ENABLE_INTERRUPTS() __enable_irq(); 37 38 34 39 35 40 #define SCHEDULER_WAKEUP() //do nothing -
trunk/firmware/openos/bsp/boards/xpressohack/radiotimer.c
r1794 r1804 14 14 #include "timer.h" 15 15 #include "LPC17xx.h" 16 #include "board.h" 16 17 17 18 //pin 0.23 is cap0 for capture. … … 22 23 radiotimer_compare_cbt overflow_cb; 23 24 radiotimer_compare_cbt compare_cb; 24 uint 16_t period;25 uint32_t period; 25 26 uint32_t counter_slot_val; //timer value when the slot timer is set- references to the init of the slot 26 27 } radiotimer_vars_t; … … 59 60 } 60 61 61 void radiotimer_start( uint16_tperiod) {62 void radiotimer_start(PORT_TIMER_WIDTH period) { 62 63 // source ACLK from 32kHz crystal 63 64 //user bsp_timer. … … 74 75 //===== direct access 75 76 76 uint16_tradiotimer_getValue() {77 PORT_TIMER_WIDTH radiotimer_getValue() { 77 78 return timer_get_current_value(TIMER_NUM3); 78 79 } 79 80 //period is in ms??? 80 81 81 void radiotimer_setPeriod( uint16_tperiod) {82 radiotimer_vars.period= period;82 void radiotimer_setPeriod(PORT_TIMER_WIDTH period) { 83 radiotimer_vars.period=(PORT_TIMER_WIDTH)period; 83 84 radiotimer_vars.counter_slot_val=radiotimer_getValue(); 84 timer_set_compare(TIMER_NUM3, TIMER_COMPARE_REG0, period); //the period timer is controlled by the compare 0 register85 timer_set_compare(TIMER_NUM3, TIMER_COMPARE_REG0, radiotimer_vars.counter_slot_val+period); //the period timer is controlled by the compare 0 register 85 86 } 86 87 //?? why is this needed? 87 88 88 uint16_tradiotimer_getPeriod() {89 return radiotimer_vars.period;89 PORT_TIMER_WIDTH radiotimer_getPeriod() { 90 return (PORT_TIMER_WIDTH)radiotimer_vars.period; 90 91 } 91 92 92 93 //===== compare 93 94 94 void radiotimer_schedule( uint16_toffset) {95 void radiotimer_schedule(PORT_TIMER_WIDTH offset) { 95 96 uint32_t current=radiotimer_vars.counter_slot_val;//references to the init of the current time slot. 96 97 // offset when to fire 97 98 //get current 98 99 //current=timer_get_current_value(TIMER_NUM3); 99 timer_set_compare(TIMER_NUM3, TIMER_COMPARE_REG1,current + offset); //this is controlled by the compare 1 register100 timer_set_compare(TIMER_NUM3, TIMER_COMPARE_REG1,current + (uint32_t)offset); //this is controlled by the compare 1 register 100 101 101 102 } … … 109 110 //===== capture 110 111 111 inline uint16_tradiotimer_getCapturedTime() {112 inline PORT_TIMER_WIDTH radiotimer_getCapturedTime() { 112 113 return timer_get_capture_value(TIMER_NUM3,TIMER_CAPTURE_REG0); 113 114 } … … 121 122 switch (source) { 122 123 case TIMER_COMPARE_REG0: 123 current=radiotimer_getValue();124 radiotimer_vars.counter_slot_val=current;//refresh init of the slot.125 126 timer_set_compare(TIMER_NUM3,TIMER_COMPARE_REG0,current+radiotimer_vars.period);124 // current=radiotimer_getValue(); 125 // radiotimer_vars.counter_slot_val=current;//refresh init of the slot. 126 // continuous timer: schedule next instant 127 // timer_set_compare(TIMER_NUM3,TIMER_COMPARE_REG0,current+radiotimer_vars.period); 127 128 if (radiotimer_vars.overflow_cb != NULL) { 128 129 // call the callback -
trunk/firmware/openos/bsp/boards/xpressohack/ssp_spi_wrapper.c
r1791 r1804 10 10 #include "ssp.h" 11 11 #include "spi.h" 12 #include "lpc17xx_pinsel.h" 12 13 13 14 #define SPI_SCK_PIN 7 /* Clock */ … … 20 21 void ssp_spi_init(){ 21 22 SSP_CFG_Type SSP_ConfigStruct; 23 PINSEL_CFG_Type PinCfg; 24 22 25 SSP_ConfigStructInit(&SSP_ConfigStruct); 23 26 27 /* 28 * Initialize SPI pin connect 29 * P0.7 - SCK; 30 * P0.6 - SSEL 31 * P0.8 - MISO 32 * P0.9 - MOSI 33 */ 24 34 25 LPC_PINCON->PINSEL0 |= 0x2<<14; //SCK1 [P0.7] 26 LPC_PINCON->PINSEL0 |= 0x2<<16; // [P0.8] MISO1 27 LPC_PINCON->PINSEL0 |= 0x2<<18; //MOSI1 [P0.9] 28 LPC_PINCON->PINSEL0 &= ~(0x3)<<12; // [P0.6] SSEL1 as GPIO. auto ssp does not work because it toggles cs between bytes. 35 PinCfg.Funcnum = 2; 36 PinCfg.OpenDrain = 0; 37 PinCfg.Pinmode = 0; 38 PinCfg.Portnum = 0; 39 PinCfg.Pinnum = 7; 40 PINSEL_ConfigPin(&PinCfg); 41 PinCfg.Pinnum = 8; 42 PINSEL_ConfigPin(&PinCfg); 43 PinCfg.Pinnum = 9; 44 PINSEL_ConfigPin(&PinCfg); 45 46 47 //LPC_PINCON->PINSEL0 |= 0x2<<14; //SCK1 [P0.7] 48 //LPC_PINCON->PINSEL0 |= 0x2<<16; // [P0.8] MISO1 49 //LPC_PINCON->PINSEL0 |= 0x2<<18; //MOSI1 [P0.9] 50 51 LPC_PINCON->PINSEL0 &= ~(0x3<<12); // [P0.6] SSEL1 as GPIO. auto ssp does not work because it toggles cs between bytes. 29 52 30 53 LPC_GPIO0->FIODIR |= (1 << SPI_SCK_PIN) | (1 << SPI_MOSI_PIN) | (1 << SPI_SSEL_PIN); -
trunk/firmware/openos/bsp/boards/xpressohack/timer.c
r1788 r1804 12 12 #include "LPC17xx.h" 13 13 #include "leds.h" 14 #include "board.h" 14 15 15 16 //=========================== defines ========================================= … … 229 230 // set Match Register 0 value 230 231 LPC_TIM3->MR0 = delayInTicks; 232 231 233 } else if (compareReg==TIMER_COMPARE_REG1) { 232 234 //interrupt when MR1 matches the value in the TC … … 661 663 if ( LPC_TIM3->IR & (0x1<<0)) { 662 664 // clear interrupt flag 665 CAPTURE_TIME(); 663 666 LPC_TIM3->IR = 0x1<<0; 664 667 // call the callback … … 667 670 if ( LPC_TIM3->IR & (0x1<<1) ) { 668 671 // clear interrupt flag 672 CAPTURE_TIME(); 669 673 LPC_TIM3->IR = 0x1<<1; 670 674 // call the callback -
trunk/firmware/openos/bsp/boards/xpressohack/uart.c
r1793 r1804 16 16 #include "LPC17xx.h" 17 17 #include "clkpwr.h" 18 #include "lpc17xx_uart.h" 19 #include "lpc17xx_pinsel.h" 18 20 19 21 //=========================== defines ========================================= … … 22 24 23 25 typedef struct { 24 25 26 uart_tx_cbt txCb; 27 uart_rx_cbt rxCb; 26 28 } uart_vars_t; 27 29 … … 29 31 30 32 //=========================== prototypes ====================================== 31 extern void UART0_IRQHandler (void); //weak function defined in cr_startup_lpc17.c 32 static void private_determinePCLK(uint32_t pclkdiv, uint32_t *pclk); 33 //extern void UART0_IRQHandler (void); //weak function defined in cr_startup_lpc17.c 33 34 34 35 36 //static void uart_set_divisors(uint32_t baudrate); 35 37 //=========================== public ========================================== 36 38 37 39 void uart_init() { 38 uint32_t baudrate;39 uint32_t Fdiv;40 uint32_t pclkdiv, pclk;41 40 42 // reset local variables 43 memset(&uart_vars,0,sizeof(uart_vars_t)); 41 //UART Configuration structure variable 42 UART_CFG_Type UARTConfigStruct; 43 // UART FIFO configuration Struct variable 44 UART_FIFO_CFG_Type UARTFIFOConfigStruct; 45 // Pin configuration for UART0 46 PINSEL_CFG_Type PinCfg; 44 47 45 #ifdef UART_BAUDRATE_115200 46 baudrate=115200; 47 #else 48 baudrate=9600; 49 #endif 50 51 LPC_PINCON->PINSEL0 &= ~0x000000F0; 52 LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2 */ 53 /* By default, the PCLKSELx value is zero, thus, the PCLK for 54 all the peripherals is 1/4 of the SystemCoreClock. */ 55 /* Bit 6~7 is for UART0 */ 56 pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; 57 58 CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_UART0,CLKPWR_PCLKSEL_CCLK_DIV_4);//default clock 48 uint32_t tmp; 59 49 60 50 61 LPC_UART0->LCR = 0x83; /* DLAB=1 , 8 bits, no Parity, 1 Stop bit 62 * 0b10000011 63 * ||||||||__ Word Length select low 64 * |||||||___ Word Length select high (set to 11 --> 8bit char length) 65 * ||||||____ Stop bit select (0=1stop bit, 1=2 stop bits) 66 * |||||_____ Parity enable (0=disable parity generation and check, 1=enable it) 67 * ||||______ Parity select low 68 * |||_______ Parity select high 69 * ||________ Break Control 70 * |_________ Divisor Latch DLAB = 0 51 /* 52 * Initialize UART0 pin connect 71 53 */ 72 Fdiv = ( pclk / 16 ) / baudrate ; /*baud rate */ 73 LPC_UART0->DLM = Fdiv / 256; /*higher 8 bits of the divisor -- divides pclk in order to get the desired baudrate. see p.301.*/ 74 LPC_UART0->DLL = Fdiv % 256; /*lower 8 bits of the divisor*/ 75 LPC_UART0->LCR = 0x03; /* UART line control register DLAB = 0 set after configuring baudrate. See manual p.298. 76 * 0b00000011 77 * ||||||||__ Word Length select low 78 * |||||||___ Word Length select high (set to 11 --> 8bit char length) 79 * ||||||____ Stop bit select (0=1stop bit, 1=2 stop bits) 80 * |||||_____ Parity enable (0=disable parity generation and check, 1=enable it) 81 * ||||______ Parity select low 82 * |||_______ Parity select high 83 * ||________ Break Control 84 * |_________ Divisor Latch DLAB = 0 54 PinCfg.Funcnum = 1; 55 PinCfg.OpenDrain = 0; 56 PinCfg.Pinmode = 0; 57 PinCfg.Pinnum = 2; 58 PinCfg.Portnum = 0; 59 PINSEL_ConfigPin(&PinCfg); 60 PinCfg.Pinnum = 3; 61 PINSEL_ConfigPin(&PinCfg); 62 63 64 /* Initialize UART Configuration parameter structure to default state: 65 * Baudrate = 9600bps 66 * 8 data bit 67 * 1 Stop bit 68 * None parity 85 69 */ 70 UART_ConfigStructInit(&UARTConfigStruct); 86 71 87 LPC_UART0->FCR = 0x07; /*0x07 Enable and reset TX and RX FIFO. page.30588 * 0b0000011189 * ||||||||__ FIFO Enable (enables Rx Data Available interrupt) 90 * |||||||___ RX FIFO Reset 91 * ||||||____ TX FIFO Reset92 * |||||_____ DMA Mode Select - see section 14.4.6.193 * ||||______ Reserved94 * |||_______ Reserved95 * ||________ RX Trigger low (for DMA)96 * |_________ RX Trigger high72 // Initialize UART0 peripheral with given to corresponding parameter 73 UART_Init((LPC_UART_TypeDef *)LPC_UART0, &UARTConfigStruct); 74 75 76 /* Initialize FIFOConfigStruct to default state: 77 * - FIFO_DMAMode = DISABLE 78 * - FIFO_Level = UART_FIFO_TRGLEV0 79 * - FIFO_ResetRxBuf = ENABLE 80 * - FIFO_ResetTxBuf = ENABLE 81 * - FIFO_State = ENABLE 97 82 */ 98 LPC_UART0->FCR |= (0 << 6);// Set FIFO to trigger when at least 1 characters available (only needed if FIFO is enabled) - p.305, 00-means 1 char,01 - 4chars.. 83 UART_FIFOConfigStructInit(&UARTFIFOConfigStruct); 84 85 // Initialize FIFO for UART0 peripheral 86 UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART0, &UARTFIFOConfigStruct); 87 88 89 // Enable UART Transmit 90 UART_TxCmd((LPC_UART_TypeDef *)LPC_UART0, ENABLE); 91 92 /* Enable UART Rx interrupt */ 93 UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_RBR, ENABLE); 94 /* Enable UART line status interrupt */ 95 UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_RLS, ENABLE); 96 UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, ENABLE); 97 /* 98 * Do not enable transmit interrupt here, since it is handled by 99 * UART_Send() function, just to reset Tx Interrupt state for the 100 * first time 101 */ 99 102 NVIC_EnableIRQ(UART0_IRQn); 100 103 101 return;102 104 } 103 105 106 107 108 109 104 110 void uart_setCallbacks(uart_tx_cbt txCb, uart_rx_cbt rxCb) { 105 106 111 uart_vars.txCb = txCb; 112 uart_vars.rxCb = rxCb; 107 113 } 108 114 109 115 void uart_enableInterrupts(){ 110 LPC_UART0->IER |= IER_THRE|IER_RBR| IER_RLS; /* Enable UART0 interrupt 111 * 0b00000111 112 * ||||||||__ RBR Interrupt Enable (enables Rx Data Available interrupt) 113 * |||||||___ THRE Interrupt 114 * ||||||____ Rx Line Status interrupt 115 * |||||_____ Reserved 116 * ||||______ Reserved 117 * |||_______ Reserved 118 * ||________ Reserved 119 * |_________ ABEOIntEn (Enables the end of auto-baud interrupt)*/ 116 UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, ENABLE); 117 UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_RBR, ENABLE); 120 118 } 121 119 122 120 void uart_disableInterrupts(){ 123 LPC_UART0->IER &= ~IER_RBR; /* Disables rx UART0 interrupt*/ 124 LPC_UART0->IER &= ~IER_THRE; /* Disables tx UART0 interrupt*/ 125 LPC_UART0->IER &= ~IER_RLS; /* Disables line Status UART0 interrupt 126 127 * 0b00000111 128 * ||||||||__ RBR Interrupt Enable (enables Rx Data Available interrupt) 129 * |||||||___ THRE Interrupt 130 * ||||||____ Rx Line Status interrupt 131 * |||||_____ Reserved 132 * ||||______ Reserved 133 * |||_______ Reserved 134 * ||________ Reserved 135 * |_________ ABEOIntEn (Enables the end of auto-baud interrupt) 136 */ 121 UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, DISABLE); 122 UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_RBR, DISABLE); 137 123 } 138 124 139 125 void uart_clearRxInterrupts(){ 140 //do nothing, are done in the isr to read the line status.126 //do nothing, are done in the isr to read the line status. 141 127 } 142 128 143 129 void uart_clearTxInterrupts(){ 144 //do nothing, are done in the isr to read the line status.130 //do nothing, are done in the isr to read the line status. 145 131 } 146 132 147 133 void uart_writeByte(uint8_t byteToWrite){ 148 LPC_UART0->THR = byteToWrite;//write 134 //UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, DISABLE); 135 //UART_Send((LPC_UART_TypeDef *)LPC_UART0,&byteToWrite,1,NONE_BLOCKING); 136 UART_SendByte((LPC_UART_TypeDef *)LPC_UART0,byteToWrite); 137 //LPC_UART0->/*DLIER.*/THR |=byteToWrite; 138 while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART0)); 139 //UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, ENABLE); 149 140 } 150 141 151 142 uint8_t uart_readByte(){ 152 return LPC_UART0->RBR; 143 uint8_t byteToRCV; 144 byteToRCV=UART_Receive((LPC_UART_TypeDef *)LPC_UART0,&byteToRCV,1,NONE_BLOCKING); 145 return byteToRCV; 153 146 } 154 147 … … 156 149 157 150 uint8_t uart_isr_tx() { 158 159 160 151 uart_clearTxInterrupts(); // TODO: do not clear, but disable when done 152 uart_vars.txCb(); 153 return 0; 161 154 } 162 155 163 156 uint8_t uart_isr_rx() { 164 165 166 157 uart_clearRxInterrupts(); // TODO: do not clear, but disable when done 158 uart_vars.rxCb(); 159 return 0; 167 160 } 168 169 161 170 162 171 163 void UART0_IRQHandler (void) 172 164 { 173 //poipoiportBASE_TYPE xHigherPriorityTaskWoken=pdFALSE; 174 uint8_t IIRValue, LSRValue; 175 uint8_t Dummy = Dummy; 165 uint32_t intsrc, tmp, tmp1; 176 166 177 IIRValue = LPC_UART0->IIR; 178 /* IIR register. clears the interrupt when read. p.303 179 * 0b10000011 180 * ||||||||__ IntStatus - 0 if at least one pending interrupt. 1 otherwise. 181 * |||||||___ Interrupt id 011-RLS,010-RDA,110-CTI,001-THRE interrupt. 182 * ||||||____ Interrupt id 011-RLS,010-RDA,110-CTI,001-THRE interrupt. 183 * |||||_____ Interrupt id 011-RLS,010-RDA,110-CTI,001-THRE interrupt. 184 * ||||______ Reserved 185 * |||_______ Reserved 186 * ||________ Fifo Enable. copies of UnFCR[0] 187 * |_________ Fifo Enable. copies of UnFCR[0] 188 */ 167 /* Determine the interrupt source */ 168 intsrc = UART_GetIntId((LPC_UART_TypeDef *)LPC_UART0); 169 tmp = intsrc & UART_IIR_INTID_MASK; 189 170 190 191 IIRValue >>= 1; /* skip pending bit in IIR */ 192 IIRValue &= 0x07; /* check bit 1~3, interrupt identification */ 193 if ( IIRValue == IIR_RLS ) /* Receive Line Status */ 194 { 195 LSRValue = LPC_UART0->LSR; 196 /* Receive Line Status */ 197 if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) ) 198 { 199 /* There are errors or break interrupt */ 200 /* Read LSR will clear the interrupt */ 201 Dummy = LPC_UART0->RBR; /* Dummy read on RX to clear 202 interrupt, then bail out */ 203 return; 204 } 205 if ( LSRValue & LSR_RDR ) /* Receive Data Ready */ 206 { 207 /* If no error on RLS, normal ready, save into the data buffer. */ 208 /* Note: read RBR will clear the interrupt */ 209 uart_isr_rx();//call isr rx wrapper. 210 171 // Receive Line Status 172 if (tmp == UART_IIR_INTID_RLS){ 173 // Check line status 174 tmp1 = UART_GetLineStatus((LPC_UART_TypeDef *)LPC_UART0); 175 // Mask out the Receive Ready and Transmit Holding empty status 176 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \ 177 | UART_LSR_BI | UART_LSR_RXFE); 178 // If any error exist 179 if (tmp1) { 180 while (1); 211 181 } 212 182 } 213 else if ( IIRValue == IIR_RDA ) /* Receive Data Available */ 214 {215 /* Receive Data Available */216 uart_isr_rx(); //call isr rx wrapper.183 184 // Receive Data Available or Character time-out 185 if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){ 186 uart_isr_rx(); 217 187 } 218 else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */ 219 { 220 /* Character Time-out indicator */ 221 //do nothing. 222 } 223 else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */ 224 { 225 /* THRE interrupt */ 226 LSRValue = LPC_UART0->LSR; /* Check status in the LSR to see if 227 valid data in U0THR or not */ 228 if ( LSRValue & LSR_THRE ) 229 { 230 //call the isr tx wrapper. 231 uart_isr_tx(); 232 } 233 else 234 { 235 //not ready yet.. nothing to do?? 236 } 188 189 // Transmit Holding Empty 190 if (tmp == UART_IIR_INTID_THRE){ 191 uart_isr_tx(); 237 192 } 238 193 } -
trunk/firmware/openos/bsp/boards/xpressohack/uart_config.h
r1555 r1804 8 8 #define UART_CONFIG_H_ 9 9 10 #define IER_RBR 0x01 11 #define IER_THRE 0x02 12 #define IER_RLS 0x04 13 14 #define IIR_PEND 0x01 15 #define IIR_RLS 0x03 16 #define IIR_RDA 0x02 17 #define IIR_CTI 0x06 18 #define IIR_THRE 0x01 19 20 #define LSR_RDR 0x01 21 #define LSR_OE 0x02 22 #define LSR_PE 0x04 23 #define LSR_FE 0x08 24 #define LSR_BI 0x10 25 #define LSR_THRE 0x20 26 #define LSR_TEMT 0x40 27 #define LSR_RXFE 0x80 28 29 30 31 #define PORTNUM_0 1 //set to 1 if you want to use port 0 32 #define PORTNUM_1 1 //set to 1 if you tant to use port 1 10 /* Accepted Error baud rate value (in percent unit) */ 11 //#define UART_ACCEPTED_BAUDRATE_ERROR (3) /*!< Acceptable UART baudrate error */ 12 // 13 //#define UART_IER_RBR 0x01 14 //#define UART_IER_THRE 0x02 15 //#define UART_IER_RLS 0x04 16 // 17 //#define UART_IIR_PEND 0x01 18 //#define UART_IIR_RLS 0x03 19 //#define UART_IIR_RDA 0x02 20 //#define UART_IIR_CTI 0x06 21 //#define UART_IIR_THRE 0x01 22 // 23 //#define UART_LSR_RDR 0x01 24 //#define UART_LSR_OE 0x02 25 //#define UART_LSR_PE 0x04 26 //#define UART_LSR_FE 0x08 27 //#define UART_LSR_BI 0x10 28 //#define UART_LSR_THRE 0x20 29 //#define UART_LSR_TEMT 0x40 30 //#define UART_LSR_RXFE 0x80 31 // 32 ///*********************************************************************//** 33 // * Macro defines for Macro defines for UART FIFO control register 34 // **********************************************************************/ 35 //#define UART_FCR_FIFO_EN ((uint8_t)(1<<0)) /*!< UART FIFO enable */ 36 //#define UART_FCR_RX_RS ((uint8_t)(1<<1)) /*!< UART FIFO RX reset */ 37 //#define UART_FCR_TX_RS ((uint8_t)(1<<2)) /*!< UART FIFO TX reset */ 38 //#define UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3)) /*!< UART DMA mode selection */ 39 //#define UART_FCR_TRG_LEV0 ((uint8_t)(0)) /*!< UART FIFO trigger level 0: 1 character */ 40 //#define UART_FCR_TRG_LEV1 ((uint8_t)(1<<6)) /*!< UART FIFO trigger level 1: 4 character */ 41 //#define UART_FCR_TRG_LEV2 ((uint8_t)(2<<6)) /*!< UART FIFO trigger level 2: 8 character */ 42 //#define UART_FCR_TRG_LEV3 ((uint8_t)(3<<6)) /*!< UART FIFO trigger level 3: 14 character */ 43 //#define UART_FCR_BITMASK ((uint8_t)(0xCF)) /*!< UART FIFO control bit mask */ 44 //#define UART_TX_FIFO_SIZE (16) 45 // 46 // 47 ///*********************************************************************//** 48 // * Macro defines for Macro defines for UART line control register 49 // **********************************************************************/ 50 //#define UART_LCR_WLEN5 ((uint8_t)(0)) /*!< UART 5 bit data mode */ 51 //#define UART_LCR_WLEN6 ((uint8_t)(1<<0)) /*!< UART 6 bit data mode */ 52 //#define UART_LCR_WLEN7 ((uint8_t)(2<<0)) /*!< UART 7 bit data mode */ 53 //#define UART_LCR_WLEN8 ((uint8_t)(3<<0)) /*!< UART 8 bit data mode */ 54 //#define UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2)) /*!< UART Two Stop Bits Select */ 55 //#define UART_LCR_PARITY_EN ((uint8_t)(1<<3)) /*!< UART Parity Enable */ 56 //#define UART_LCR_PARITY_ODD ((uint8_t)(0)) /*!< UART Odd Parity Select */ 57 //#define UART_LCR_PARITY_EVEN ((uint8_t)(1<<4)) /*!< UART Even Parity Select */ 58 //#define UART_LCR_PARITY_F_1 ((uint8_t)(2<<4)) /*!< UART force 1 stick parity */ 59 //#define UART_LCR_PARITY_F_0 ((uint8_t)(3<<4)) /*!< UART force 0 stick parity */ 60 //#define UART_LCR_BREAK_EN ((uint8_t)(1<<6)) /*!< UART Transmission Break enable */ 61 //#define UART_LCR_DLAB_EN ((uint8_t)(1<<7)) /*!< UART Divisor Latches Access bit enable */ 62 //#define UART_LCR_BITMASK ((uint8_t)(0xFF)) /*!< UART line control bit mask */ 63 // 64 // 65 //#define UART_TER_TXEN ((uint8_t)(1<<7)) /*!< Transmit enable bit */ 66 // 67 // 68 // 69 // 70 //#define UART_LSR_BITMASK ((uint8_t)(0xFF)) /*!<UART Line status bit mask */ 71 // 72 //#define UART_LOAD_DLM(div) (((div) >> 8) & 0xFF) /**< Macro for loading most significant halfs of divisors */ 73 //#define UART_LOAD_DLL(div) ((div) & 0xFF) /**< Macro for loading least significant halfs of divisors */ 74 //#define UART_LCR_BITMASK ((uint8_t)(0xFF)) /*!< UART line control bit mask */ 75 // 76 //#define UART_FDR_DIVADDVAL(n) ((uint32_t)(n&0x0F)) /**< Baud-rate generation pre-scaler divisor */ 77 //#define UART_FDR_MULVAL(n) ((uint32_t)((n<<4)&0xF0)) /**< Baud-rate pre-scaler multiplier value */ 78 //#define UART_FDR_BITMASK ((uint32_t)(0xFF)) /**< UART Fractional Divider register bit mask */ 79 // 80 //#define PORTNUM_0 1 //set to 1 if you want to use port 0 81 //#define PORTNUM_1 1 //set to 1 if you tant to use port 1 33 82 34 83
Note: See TracChangeset
for help on using the changeset viewer.
